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© 2010-2011 Microchip Technology Inc. DS70645C-page 14-1
High-Speed PWM
14
Section 14. High-Speed PWM
HIGHLIGHTS
This section of the manual contains the following major topics:
14.1 Introduction .................................................................................................................. 14-2
14.2 Features....................................................................................................................... 14-2
14.3 Control Registers ......................................................................................................... 14-3
14.4 Architecture Overview................................................................................................ 14-24
14.5 Module Description .................................................................................................... 14-27
14.6 PWM Operating Modes.............................................................................................. 14-33
14.7 PWM Generator......................................................................................................... 14-71
14.8 PWM Trigger.............................................................................................................. 14-87
14.9 PWM Interrupts.......................................................................................................... 14-98
14.10 PWM Fault Pins ......................................................................................................... 14-99
14.11 Special Features ...................................................................................................... 14-105
14.12 PWM Output Pin Control...........................................................................................14-111
14.13 Immediate Update of PWM Duty Cycle ................................................................... 14-113
14.14 Power-Saving Modes............................................................................................... 14-114
14.15 External Control of Individual Time Base(s)............................................................. 14-114
14.16 Application Information ............................................................................................ 14-115
14.17 Register Map............................................................................................................ 14-126
14.18 Related Application Notes........................................................................................ 14-127
14.19 Revision History ....................................................................................................... 14-128
dsPIC33E/PIC24E Family Reference Manual
DS70645C-page 14-2 © 2010-2011 Microchip Technology Inc.
14.1 INTRODUCTION
This section describes the High-Speed Pulse-Width Modulator (PWM) module and its
associated operational modes. The High-Speed PWM module in the dsPIC33E/PIC24E
device family supports a wide variety of PWM modes and is ideal for power
conversion/motor control applications. Some of the common applications include:
AC-to-DC converters
DC-to-DC converters
AC and DC motors: BLDC, PMSM, ACIM, SRM, etc.
• Inverters
Battery chargers
Digital lighting
Uninterrupted Power Supply (UPS)
Power Factor Correction (PFC) (e.g., Interleaved PFC and Bridgeless PFC)
14.2 FEATURES
The High-Speed PWM module consists of the following major features:
Up to seven PWM generators, each with an individual time base
Two PWM outputs per PWM generator
Individual period and duty cycle for each PWM output
Duty cycle, dead time, phase shift and frequency resolution equal to the system clock
source (TOSC)
Independent fault and current-limit inputs for up to 14 PWM outputs
Redundant Output mode
Independent Output mode (this feature is not available on all devices)
Push-Pull Output mode
Complementary Output mode
Center-Aligned PWM mode
Output override control
Special Event Trigger
PWM capture feature
Prescaler for input clock
ADC triggering with PWM
Independent PWM frequency, duty cycle and phase shift changes
Leading-Edge Blanking (LEB) functionality
Dead time compensation
Output clock chopping
Note: This family reference manual section is meant to serve as a complement to device
data sheets. Depending on the device variant, this manual section may not apply to
all dsPIC33E/PIC24E devices.
Please consult the note at the beginning of the “High-Speed PWM” chapter in the
current device data sheet to check whether this document supports the device you
are using.
Device data sheets and family reference manual sections are available for
download from the Microchip Worldwide Web site at: http://www.microchip.com
© 2010-2011 Microchip Technology Inc. DS70645C-page 14-11
Section 14. High-Speed PWM
High-Speed PWM
14
Register 14-11: PWMKEY: PWM Unlock Register(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PWMKEY<15:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PWMKEY<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 PWMKEY<15:0>: PWM Unlock bits
If the PWMLOCK Configuration bit is asserted (PWMLOCK = 1), the IOCONx and FCLCONx registers
are writable only after the proper sequence is written to the PWMKEY register. If the PWMLOCK
Configuration bit is deasserted (PWMLOCK = 0), the IOCONx and FCLCONx registers are writable at
all times. Refer to 14.5.3 “Write Protection” for further details of the unlock sequence.
Note 1: This register is implemented only in devices where the PWMLOCK Configuration bit is present in the
FOSCSEL Configuration register.
dsPIC33E/PIC24E Family Reference Manual
DS70645C-page 14-16 © 2010-2011 Microchip Technology Inc.
Register 14-14: FCLCONx: PWM Fault Current-Limit Control Register
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IFLTMOD(4) CLSRC<4:0>(2,3) CLPOL(1) CLMOD
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
FLTSRC<4:0>(2,3) FLTPOL(1) FLTMOD<1:0>(4)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 IFLTMOD: Independent Fault Mode Enable bit
(4)
1 = Independent Fault mode: Current-limit input maps FLTDAT<1> to PWMxH output, and fault input
maps FLTDAT<0> to PWMxL output. The CLDAT<1:0> bits are not used for override functions.
0= Normal Fault mode: Current-limit and fault inputs map CLDAT<1:0> and FLTDAT<1:0> to PWMxH
and PWMxL outputs.
bit 14-10 CLSRC<4:0>: Current-Limit Control Signal Source Select bits for PWM Generator #
(2,3)
These bits specify the current-limit control signal source. Refer to the “High-Speed PWM” chapter of
the specific device data sheet for available selections.
bit 9 CLPOL: Current-Limit Polarity bit for PWM Generator #(1)
1 = The selected current-limit source is active-low
0 = The selected current-limit source is active-high
bit 8 CLMOD: Current-Limit Mode Enable bit for PWM Generator #
1 = Current-Limit mode is enabled
0 = Current-Limit mode is disabled
bit 7-3 FLTSRC<4:0>: Fault Control Signal Source Select bits for PWM Generator #
(2,3)
These bits specify the Fault control source. Refer to the “High-Speed PWM” chapter of the specific
device data sheet for available selections.
bit 2 FLTPOL: Fault Polarity bit for PWM Generator #(1)
1 = The selected fault source is active-low
0 = The selected fault source is active-high
bit 1-0 FLTMOD<1:0>: Fault Mode bits for PWM Generator #(4)
11 = Fault input is disabled
10 = Reserved
01 = The selected fault source forces PWMxH, PWMxL pins to FLTDAT values (cycle)
00 = The selected fault source forces PWMxH, PWMxL pins to FLTDAT values (latched condition)
Note 1: These bits should be changed only when PTEN = 0. Changing the polarity selection during operation will
yield unpredictable results.
2: When Independent Fault mode is enabled (IFLTMOD = 1) and Fault 1 is used for Fault mode
(FLTSRC<4:0> = b0000), the Current-Limit Control Source Select bits (CLSRC<4:0>) should be set to an
unused current-limit source to prevent the current-limit source from disabling both the PWMxH and
PWMxL outputs.
3: When Independent Fault mode is enabled (IFLTMOD = 1), and Fault 1 is used for Current-Limit mode
(CLSRC<4:0> = b0000), the Fault Control Source Select bits (FLTSRC<4:0>) should be set to an unused
fault source to prevent Fault 1 from disabling both the PWMxL and PWMxH outputs.
4: This feature is not available on all devices. Refer to the High-Speed PWM” chapter of the specific device
data sheet for availability.

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Márka: Microchip
Kategória: nincs kategorizálva
Modell: DSPIC33EP128MC502

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